Preview and Validate your "Design for Test" before Production Release
Engineering Station allows designers and test engineers to verify and to debug boards and systems using the full potential of the benefits brought by Boundary-scan and the JTAG (IEEE 1149.1) standard.
It includes all the functionality you need to : define Unit Under Test (UUT), check BSDL, verify scan chain integrity (infrastructure tests), perform interconnect tests, create complex functional tests using TCL language and to execute diagnostics on nets and signals. This station allows you to declare your board and build a debugging project in a few hours, which leaves you more time for your debugging !
One of the key advantages of DiaTem Studio is the providing of a static analysis of test coverage and the ability to check testability during the design process.
This analysis is linked to a Net Navigator that quickly leverages your understanding of what can be improved in the JTAG testability. The benefit is that you can be sure that your DfT is optimized before manufacturing the boards.
A new version of the Board Manager adds more flexibility, control and enhanced performance. It introduces Virtual Board and Virtual Component entities into the hierarchy of a project. You can thus choose to mount a virtual component available in your hierarchy to simply implement this one into your physical JTAG chain.
-Test coverage analysis
-BSDL components checking and a library of more than 1000 JTAG components
-Infrastructure diagnostics (scan chain integrity)
-Automatic Test Pattern Generator (ATPG) for interconnection, clusters and memories
-Large configuration possibilities for Interconnection tests : tracks, clusters, algorithms
-Support of more than 90 netlists formats
-Custom test development through TCL language
-Display of results as waveform or state table
-Fault detection on devices or boards through interactive access
-Interactive control and observation of signals at the register, bus or pin level
-In-System Programming Solution Option (IPSO) for Flash Memory and Programmable Logic Devices (PLD)
-SVF file format export
-Multi-TAP and GPIO access and support through TemTag USB controller