Your verification runs on-chip and at speed
DiaLite Platform Edition is the most complete and powerful tool available on the market to verify and debug your SoC or FPGA.
The Platform Edition includes all features of the Power Edge Edition plus the Assertion Checker (AC) module. This IP allows designers to embed their system assertion conditions along with their system specifications before synthesis and then check them at speed.
The Assertion Checker is built on the PSL and SVA standard, which makes all your format verification tests and system properties reusable. Unlike conventional format verification, the "On-Chip Assertions" approach allows you to skip extensive processing run time and so cover possible behavior deviations at the system level.
DiaLite Platform Edition is thus well adapted to complex test scenarios involving race hazards and asynchrounous events. While your design is running at full speed, the On-Chip Verification Process monitors and checks that your properties are not infringed. The cover directive even gives you metrication for your verification process.
Check here a list of benefits for the Assertion Checker
Download here the DiaLite Platform brochure
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